A computer may include multiple processors, which may include physical and logical processors. Operating systems may utilize inter-processor interrupts (IPIs) to transfer requests between processors in a system. An operating system may use an inter-processor interrupts in order to have one processor initiate specific actions for one or more other processors. Such actions may include a TLB (translation look-aside buffer) shootdown interrupt, in which a processor sends an interrupt to other processor to request invalidation of a TLB entry. Cache flushing may be initiated by receiving processors in response to a global change made by a sending processor, such as changes in the linear address mappings or changes in the memory caching attributes for a particular memory range.
However, inter-processor interrupt signals may require a large overhead for both the sending processor side and the receiving processor side. The sending processor needs to perform memory accesses to send an interrupt through a programmable interrupt controller, such as a local advanced programmable interrupt controller (APIC). In turn, the receiving processor may absorb considerable overhead in the process of receiving an interrupt.